Digital IC
  • Textbook
  • Morris Mano
    • Digital Design: With an Introduction to the Verilog HDL 5th by by M. Morris R. Mano and Michael D. Ciletti
    • Logic & Computer Design Fundamentals 5th, 2nd by M. Morris R. Mano, Charles R. Kime and Tom Martin
    • Computer System Architecture by Morris Mano 3rd, 3rd
  • Digital Design & Computer Architecture 2nd by David & Sarah Harris
  • Digital Design by F. Vahid
  • Contemporary Logic Design by R. Katz & G. Borriello
  • Fundamentals of Logic Design by C. H. Roth, Jr. and L. L. Kinney 7th
static-hazards.gifdynamic-hazards.gif
  • A static hazard is when the output should remain static but experiences an unwanted pulse.
  • A dynamic hazard is when the output should go through a smooth transition but changes more than once before settling at the new value.
Unless otherwise stated, the content of this page is licensed under Creative Commons Attribution-ShareAlike 3.0 License