I2C

• Synchronous Serial

• Textbook
  • The I2C Bus from Theory to Practice

NXP

• THE I 2C-BUS SPECIFICATION
  • Version 2.1
  • Version 3
• UM10204 - I2C-bus specification and user manual
• AN10216-01 - I2C MANUAL
• AN255, I2C / SMBus Repeaters, Hubs and Expanders
• AN262 PCA954X Family of I²C Multiplexers
  • 

Fundamentals

• design
  • clock (SCL) line
  • data (SDA) line
• 由荷蘭Philips半導體所提出
• 定址模式
  • 10-bit長定址(1,024個)
  • 7-bit短定址(128個)
• low-speed(v1.0)
  • 10kbps, 100kbps, 400kbps
• high-speed(v2.0, V2.1)
  • 3.4Mbps

• Using the I2C Bus

Start/Stop

ACK

Arbitration

• SCL Arbitratoion

• SDA Arbitration
  • If the address bit and the R/nW are the same, the arbitration scheme considers the data.
  • Because the I2C bus has a wired-AND nature, a transfer does not lose data if multiple masters signal the same bus states.
  • If the address and the R/nW bit or the data they contain are different, the master that sent the first high data bit loses arbitration and shuts off its data drivers.

Write

Read

PXA270 I2C Registers

• Intel® PXA27x Processor Family Developer’s Manual

Register	Description
IBMR	I2C Bus Monitor register
IDBR	I2C Data Buffer register
ICR	I2C Control register
ISR	I2C Status register
ISAR	I2C Slave Address register

• Vendor

USB-to-I2C

• Cypress
  • CY7C68013
• FTDI

RS232-to-I2C

• Microchip
  • PIC16F872

• Driver
  • MSP430 i2c driver
  • Silicon Image SIL9034 HDMI i2c driver

• voltage-level translator
  • PCA9306
    • In I2C applications, the bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9306 enables the system designer to isolate two halves of a bus; thus, more I2C devices or longer trace length can be accommodated.
    • PCA9306-Q1

• SMBus(System Management Bus)
  • SMBus 與 I2C Bus 有什麼不同?
  • Comparing the I²C Bus to the SMBus