Memory Barrier
  • Each operation is stamped with a global wall-clock time
  • Rules
    1. Each read gets the latest written value
    2. All operations at one CPU are executed in order of their timestamps
  • The solution to compiler optimization and hardware reordering is to place a memory barrier between operations that must be visible to the hardware (or to another processor) in a particular order. Linux provides four macros to cover all possible ordering needs.
    • barrier - prevent only compiler reordering
    • mb - prevents load and store reordering
      • Memory Barriers: instructions to compiler and/or hardware to complete all pending accesses before issuing any more
    • rmb - prevents load reordering
      • Read memory barriers: prevent reordering of read instructions
      • A rmb (read memory barrier) guarantees that any reads appearing before the barrier are completed prior to the execution of any subsequent read.
    • wmb - prevents store reordering
      • Write memory barriers: prevent reordering of write instructions
  • smp_mb – prevent load and store reordering only in SMP kernel
  • smp_rmb – prevent load reordering only in SMP kernels
  • smp_wmb – prevent store reordering only in SMP kernels
  • set_mb – performs assignment and prevents load and store reordering
__asm__ __volatile__("": : :"memory")
  • 內存屏障(memory barrier)
    • volatile 代表這行指令(這些組合語言),不和前面的指令一起最佳化
    • "memory" 告訴GCC這些組合語言會改變所有的RAM的資料
    • 因為沒組合語言,又告訴gcc所有RAM的內容都改變, 所以這個memory barrier的效用, 會讓這行之前被gcc所cache到暫存器的資料通通寫回RAM裡面, 也告訴gcc會讓之後讀取RAM的資料,必須再從RAM裡讀取出來.
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